Loading 386.h +12 −2 Original line number Diff line number Diff line /* $Id: 386.h,v 1.3 1994-09-08 17:20:03 anton Exp $ $Id: 386.h,v 1.4 1994-09-09 16:27:15 anton Exp $ Copyright 1992 by the ANSI figForth Development Group This is the machine-specific part for Intel 386 compatible processors Loading Loading @@ -27,7 +27,7 @@ typedef float SFloat; /* #define BIG_ENDIAN */ /* define this if the processor cannot exploit instruction-level parallelism and/or has few registers */ parallelism (no pipelining or too few registers) */ #define CISC_NEXT #ifdef DIRECT_THREADED Loading Loading @@ -58,4 +58,14 @@ typedef float SFloat; #define MAKE_DOES_CF(addr,doesp) MAKE_CF(addr,((int)(doesp)-8)) #endif #ifdef FORCE_REG #define IPREG asm("%esi") #define SPREG asm("%edi") #ifdef USE_TOS #define CFAREG asm("%ecx") #else #define CFAREG asm("%edx") #endif #endif /* FORCE_REG */ #define rint(x) floor((x)+0.5) cross.fs +3 −3 Original line number Diff line number Diff line \ CROSS.FS The Cross-Compiler 06oct92py \ $Id: cross.fs,v 1.11 1994-09-02 15:23:33 pazsan Exp $ \ $Id: cross.fs,v 1.12 1994-09-09 16:27:17 anton Exp $ \ Idea and implementation: Bernd Paysan (py) \ Copyright 1992 by the ANSI figForth Development Group Loading Loading @@ -110,7 +110,7 @@ include-file >CROSS endian 0 pad ! -1 pad c! pad @ 0< bigendian 0 pad ! -1 pad c! pad @ 0< = [IF] : bswap ; immediate [ELSE] : bswap ( big / little -- little / big ) 0 cell 1- FOR bits/byte lshift over Loading Loading @@ -733,7 +733,7 @@ Cond: [ELSE] [ELSE] ;Cond \ [THEN] \ included throw after create-file 11may93jaw endian Constant endian bigendian Constant bigendian : save-cross ( "name" -- ) bl parse ." Saving to " 2dup type Loading engine.c +43 −28 Original line number Diff line number Diff line /* $Id: engine.c,v 1.14 1994-09-08 17:20:05 anton Exp $ $Id: engine.c,v 1.15 1994-09-09 16:27:18 anton Exp $ Copyright 1992 by the ANSI figForth Development Group */ Loading Loading @@ -123,33 +123,49 @@ static char* fileattr[6]={"r","rb","r+","r+b","w+","w+b"}; static Address up0=NULL; #if defined(i386) && defined(FORCE_REG) # define REG(reg) __asm__(reg) Label *engine(Xt *ip0, Cell *sp0, Cell *rp, Float *fp, Address lp) { register Xt *ip REG("%esi")=ip0; register Cell *sp REG("%edi")=sp0; #else # define REG(reg) Label *engine(Xt *ip, Cell *sp, Cell *rp, Float *fp, Address lp) { /* if machine.h has not defined explicit registers, define them as implicit */ #ifndef IPREG #define IPREG #endif #ifndef SPREG #define SPREG #endif #ifndef RPREG #define RPREG #endif #ifndef FPREG #define FPREG #endif #ifndef LPREG #define LPREG #endif #ifndef CFAREG #define CFAREG #endif #ifndef UPREG #define UPREG #endif #ifndef TOSREG #define TOSREG #endif #ifndef FTOSREG #define FTOSREG #endif Label *engine(Xt *ip0, Cell *sp0, Cell *rp0, Float *fp0, Address lp0) /* executes code at ip, if ip!=NULL returns array of machine code labels (for use in a loader), if ip==NULL */ register Xt cfa #ifdef i386 # ifdef USE_TOS REG("%ecx") # else REG("%edx") # endif #endif ; Address up=up0; { register Xt *ip IPREG = ip0; register Cell *sp SPREG = sp0; register Cell *rp RPREG = rp0; register Float *fp FPREG = fp0; register Address lp LPREG = lp0; register Xt cfa CFAREG; register Address up UPREG = up0; IF_TOS(register Cell TOS TOSREG;) IF_FTOS(register Float FTOS FTOSREG;) static Label symbols[]= { &&docol, &&docon, Loading @@ -160,8 +176,6 @@ Label *engine(Xt *ip, Cell *sp, Cell *rp, Float *fp, Address lp) &&dodoes, /* dummy for does handler address */ #include "prim_labels.i" }; IF_TOS(register Cell TOS;) IF_FTOS(Float FTOS;) #ifdef CPU_DEP CPU_DEP; #endif Loading @@ -178,12 +192,12 @@ Label *engine(Xt *ip, Cell *sp, Cell *rp, Float *fp, Address lp) #ifdef DEBUG printf("%08x: col: %08x\n",(Cell)ip,(Cell)PFA1(cfa)); #endif #ifdef i386 #ifdef CISC_NEXT /* this is the simple version */ *--rp = (Cell)ip; ip = (Xt *)PFA1(cfa); NEXT; #endif #else /* this one is important, so we help the compiler optimizing The following version may be better (for scheduling), but probably has problems with code fields employing calls and delay slots Loading @@ -197,6 +211,7 @@ Label *engine(Xt *ip, Cell *sp, Cell *rp, Float *fp, Address lp) ip = current_ip+1; NEXT1_P2; } #endif docon: #ifdef DEBUG Loading mach32b.fs +1 −1 Original line number Diff line number Diff line Loading @@ -5,5 +5,5 @@ 5 Constant cell>bit 8 Constant bits/byte 8 Constant float true Constant endian true Constant bigendian ( true=big, false=little ) mach32l.fs +1 −1 Original line number Diff line number Diff line Loading @@ -5,5 +5,5 @@ 5 Constant cell>bit 8 Constant bits/byte 8 Constant float false Constant endian false Constant bigendian ( true=big, false=little ) Loading
386.h +12 −2 Original line number Diff line number Diff line /* $Id: 386.h,v 1.3 1994-09-08 17:20:03 anton Exp $ $Id: 386.h,v 1.4 1994-09-09 16:27:15 anton Exp $ Copyright 1992 by the ANSI figForth Development Group This is the machine-specific part for Intel 386 compatible processors Loading Loading @@ -27,7 +27,7 @@ typedef float SFloat; /* #define BIG_ENDIAN */ /* define this if the processor cannot exploit instruction-level parallelism and/or has few registers */ parallelism (no pipelining or too few registers) */ #define CISC_NEXT #ifdef DIRECT_THREADED Loading Loading @@ -58,4 +58,14 @@ typedef float SFloat; #define MAKE_DOES_CF(addr,doesp) MAKE_CF(addr,((int)(doesp)-8)) #endif #ifdef FORCE_REG #define IPREG asm("%esi") #define SPREG asm("%edi") #ifdef USE_TOS #define CFAREG asm("%ecx") #else #define CFAREG asm("%edx") #endif #endif /* FORCE_REG */ #define rint(x) floor((x)+0.5)
cross.fs +3 −3 Original line number Diff line number Diff line \ CROSS.FS The Cross-Compiler 06oct92py \ $Id: cross.fs,v 1.11 1994-09-02 15:23:33 pazsan Exp $ \ $Id: cross.fs,v 1.12 1994-09-09 16:27:17 anton Exp $ \ Idea and implementation: Bernd Paysan (py) \ Copyright 1992 by the ANSI figForth Development Group Loading Loading @@ -110,7 +110,7 @@ include-file >CROSS endian 0 pad ! -1 pad c! pad @ 0< bigendian 0 pad ! -1 pad c! pad @ 0< = [IF] : bswap ; immediate [ELSE] : bswap ( big / little -- little / big ) 0 cell 1- FOR bits/byte lshift over Loading Loading @@ -733,7 +733,7 @@ Cond: [ELSE] [ELSE] ;Cond \ [THEN] \ included throw after create-file 11may93jaw endian Constant endian bigendian Constant bigendian : save-cross ( "name" -- ) bl parse ." Saving to " 2dup type Loading
engine.c +43 −28 Original line number Diff line number Diff line /* $Id: engine.c,v 1.14 1994-09-08 17:20:05 anton Exp $ $Id: engine.c,v 1.15 1994-09-09 16:27:18 anton Exp $ Copyright 1992 by the ANSI figForth Development Group */ Loading Loading @@ -123,33 +123,49 @@ static char* fileattr[6]={"r","rb","r+","r+b","w+","w+b"}; static Address up0=NULL; #if defined(i386) && defined(FORCE_REG) # define REG(reg) __asm__(reg) Label *engine(Xt *ip0, Cell *sp0, Cell *rp, Float *fp, Address lp) { register Xt *ip REG("%esi")=ip0; register Cell *sp REG("%edi")=sp0; #else # define REG(reg) Label *engine(Xt *ip, Cell *sp, Cell *rp, Float *fp, Address lp) { /* if machine.h has not defined explicit registers, define them as implicit */ #ifndef IPREG #define IPREG #endif #ifndef SPREG #define SPREG #endif #ifndef RPREG #define RPREG #endif #ifndef FPREG #define FPREG #endif #ifndef LPREG #define LPREG #endif #ifndef CFAREG #define CFAREG #endif #ifndef UPREG #define UPREG #endif #ifndef TOSREG #define TOSREG #endif #ifndef FTOSREG #define FTOSREG #endif Label *engine(Xt *ip0, Cell *sp0, Cell *rp0, Float *fp0, Address lp0) /* executes code at ip, if ip!=NULL returns array of machine code labels (for use in a loader), if ip==NULL */ register Xt cfa #ifdef i386 # ifdef USE_TOS REG("%ecx") # else REG("%edx") # endif #endif ; Address up=up0; { register Xt *ip IPREG = ip0; register Cell *sp SPREG = sp0; register Cell *rp RPREG = rp0; register Float *fp FPREG = fp0; register Address lp LPREG = lp0; register Xt cfa CFAREG; register Address up UPREG = up0; IF_TOS(register Cell TOS TOSREG;) IF_FTOS(register Float FTOS FTOSREG;) static Label symbols[]= { &&docol, &&docon, Loading @@ -160,8 +176,6 @@ Label *engine(Xt *ip, Cell *sp, Cell *rp, Float *fp, Address lp) &&dodoes, /* dummy for does handler address */ #include "prim_labels.i" }; IF_TOS(register Cell TOS;) IF_FTOS(Float FTOS;) #ifdef CPU_DEP CPU_DEP; #endif Loading @@ -178,12 +192,12 @@ Label *engine(Xt *ip, Cell *sp, Cell *rp, Float *fp, Address lp) #ifdef DEBUG printf("%08x: col: %08x\n",(Cell)ip,(Cell)PFA1(cfa)); #endif #ifdef i386 #ifdef CISC_NEXT /* this is the simple version */ *--rp = (Cell)ip; ip = (Xt *)PFA1(cfa); NEXT; #endif #else /* this one is important, so we help the compiler optimizing The following version may be better (for scheduling), but probably has problems with code fields employing calls and delay slots Loading @@ -197,6 +211,7 @@ Label *engine(Xt *ip, Cell *sp, Cell *rp, Float *fp, Address lp) ip = current_ip+1; NEXT1_P2; } #endif docon: #ifdef DEBUG Loading
mach32b.fs +1 −1 Original line number Diff line number Diff line Loading @@ -5,5 +5,5 @@ 5 Constant cell>bit 8 Constant bits/byte 8 Constant float true Constant endian true Constant bigendian ( true=big, false=little )
mach32l.fs +1 −1 Original line number Diff line number Diff line Loading @@ -5,5 +5,5 @@ 5 Constant cell>bit 8 Constant bits/byte 8 Constant float false Constant endian false Constant bigendian ( true=big, false=little )