made declaring explicit register variables available for all machines (23c4e8e4) · Commits · Bernd Paysan / gforth

386.h

+12 −2

Original line number	Original line	Diff line number	Diff line
	/*		/*
	$Id: 386.h,v 1.3 1994-09-08 17:20:03 anton Exp $		$Id: 386.h,v 1.4 1994-09-09 16:27:15 anton Exp $
	Copyright 1992 by the ANSI figForth Development Group		Copyright 1992 by the ANSI figForth Development Group

	This is the machine-specific part for Intel 386 compatible processors		This is the machine-specific part for Intel 386 compatible processors
	@@ -27,7 +27,7 @@ typedef float SFloat;
	/* #define BIG_ENDIAN */		/* #define BIG_ENDIAN */

	/* define this if the processor cannot exploit instruction-level		/* define this if the processor cannot exploit instruction-level
	parallelism and/or has few registers */		parallelism (no pipelining or too few registers) */
	#define CISC_NEXT		#define CISC_NEXT

	#ifdef DIRECT_THREADED		#ifdef DIRECT_THREADED
	@@ -58,4 +58,14 @@ typedef float SFloat;
	#define MAKE_DOES_CF(addr,doesp) MAKE_CF(addr,((int)(doesp)-8))		#define MAKE_DOES_CF(addr,doesp) MAKE_CF(addr,((int)(doesp)-8))
	#endif		#endif

			#ifdef FORCE_REG
			#define IPREG asm("%esi")
			#define SPREG asm("%edi")
			#ifdef USE_TOS
			#define CFAREG asm("%ecx")
			#else
			#define CFAREG asm("%edx")
			#endif
			#endif /* FORCE_REG */

	#define rint(x) floor((x)+0.5)		#define rint(x) floor((x)+0.5)

cross.fs

+3 −3

Original line number	Original line	Diff line number	Diff line
	\ CROSS.FS The Cross-Compiler 06oct92py		\ CROSS.FS The Cross-Compiler 06oct92py
	\ $Id: cross.fs,v 1.11 1994-09-02 15:23:33 pazsan Exp $		\ $Id: cross.fs,v 1.12 1994-09-09 16:27:17 anton Exp $
	\ Idea and implementation: Bernd Paysan (py)		\ Idea and implementation: Bernd Paysan (py)
	\ Copyright 1992 by the ANSI figForth Development Group		\ Copyright 1992 by the ANSI figForth Development Group

	@@ -110,7 +110,7 @@ include-file

	>CROSS		>CROSS

	endian 0 pad ! -1 pad c! pad @ 0<		bigendian 0 pad ! -1 pad c! pad @ 0<
	= [IF] : bswap ; immediate		= [IF] : bswap ; immediate
	[ELSE] : bswap ( big / little -- little / big ) 0		[ELSE] : bswap ( big / little -- little / big ) 0
	cell 1- FOR bits/byte lshift over		cell 1- FOR bits/byte lshift over
	@@ -733,7 +733,7 @@ Cond: [ELSE] [ELSE] ;Cond
	\ [THEN]		\ [THEN]
	\ included throw after create-file 11may93jaw		\ included throw after create-file 11may93jaw

	endian Constant endian		bigendian Constant bigendian

	: save-cross ( "name" -- )		: save-cross ( "name" -- )
	bl parse ." Saving to " 2dup type		bl parse ." Saving to " 2dup type

engine.c

+43 −28

Original line number	Original line	Diff line number	Diff line
	/*		/*
	$Id: engine.c,v 1.14 1994-09-08 17:20:05 anton Exp $		$Id: engine.c,v 1.15 1994-09-09 16:27:18 anton Exp $
	Copyright 1992 by the ANSI figForth Development Group		Copyright 1992 by the ANSI figForth Development Group
	*/		*/

	@@ -123,33 +123,49 @@ static char* fileattr[6]={"r","rb","r+","r+b","w+","w+b"};

	static Address up0=NULL;		static Address up0=NULL;

	#if defined(i386) && defined(FORCE_REG)		/* if machine.h has not defined explicit registers, define them as implicit */
	# define REG(reg) __asm__(reg)		#ifndef IPREG
			#define IPREG
	Label engine(Xt ip0, Cell sp0, Cell rp, Float *fp, Address lp)		#endif
	{		#ifndef SPREG
	register Xt *ip REG("%esi")=ip0;		#define SPREG
	register Cell *sp REG("%edi")=sp0;		#endif
			#ifndef RPREG
	#else		#define RPREG
	# define REG(reg)		#endif
			#ifndef FPREG
	Label engine(Xt ip, Cell sp, Cell rp, Float *fp, Address lp)		#define FPREG
	{		#endif
			#ifndef LPREG
			#define LPREG
			#endif
			#ifndef CFAREG
			#define CFAREG
			#endif
			#ifndef UPREG
			#define UPREG
	#endif		#endif
			#ifndef TOSREG
			#define TOSREG
			#endif
			#ifndef FTOSREG
			#define FTOSREG
			#endif

			Label engine(Xt ip0, Cell sp0, Cell rp0, Float *fp0, Address lp0)
	/* executes code at ip, if ip!=NULL		/* executes code at ip, if ip!=NULL
	returns array of machine code labels (for use in a loader), if ip==NULL		returns array of machine code labels (for use in a loader), if ip==NULL
	*/		*/
	register Xt cfa		{
	#ifdef i386		register Xt *ip IPREG = ip0;
	# ifdef USE_TOS		register Cell *sp SPREG = sp0;
	REG("%ecx")		register Cell *rp RPREG = rp0;
	# else		register Float *fp FPREG = fp0;
	REG("%edx")		register Address lp LPREG = lp0;
	# endif		register Xt cfa CFAREG;
	#endif		register Address up UPREG = up0;
	;		IF_TOS(register Cell TOS TOSREG;)
	Address up=up0;		IF_FTOS(register Float FTOS FTOSREG;)
	static Label symbols[]= {		static Label symbols[]= {
	&&docol,		&&docol,
	&&docon,		&&docon,
	@@ -160,8 +176,6 @@ Label engine(Xt ip, Cell sp, Cell rp, Float *fp, Address lp)
	&&dodoes, /* dummy for does handler address */		&&dodoes, /* dummy for does handler address */
	#include "prim_labels.i"		#include "prim_labels.i"
	};		};
	IF_TOS(register Cell TOS;)
	IF_FTOS(Float FTOS;)
	#ifdef CPU_DEP		#ifdef CPU_DEP
	CPU_DEP;		CPU_DEP;
	#endif		#endif
	@@ -178,12 +192,12 @@ Label engine(Xt ip, Cell sp, Cell rp, Float *fp, Address lp)
	#ifdef DEBUG		#ifdef DEBUG
	printf("%08x: col: %08x\n",(Cell)ip,(Cell)PFA1(cfa));		printf("%08x: col: %08x\n",(Cell)ip,(Cell)PFA1(cfa));
	#endif		#endif
	#ifdef i386		#ifdef CISC_NEXT
	/* this is the simple version */		/* this is the simple version */
	*--rp = (Cell)ip;		*--rp = (Cell)ip;
	ip = (Xt *)PFA1(cfa);		ip = (Xt *)PFA1(cfa);
	NEXT;		NEXT;
	#endif		#else
	/* this one is important, so we help the compiler optimizing		/* this one is important, so we help the compiler optimizing
	The following version may be better (for scheduling), but probably has		The following version may be better (for scheduling), but probably has
	problems with code fields employing calls and delay slots		problems with code fields employing calls and delay slots
	@@ -197,6 +211,7 @@ Label engine(Xt ip, Cell sp, Cell rp, Float *fp, Address lp)
	ip = current_ip+1;		ip = current_ip+1;
	NEXT1_P2;		NEXT1_P2;
	}		}
			#endif

	docon:		docon:
	#ifdef DEBUG		#ifdef DEBUG

mach32b.fs

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -5,5 +5,5 @@
	5 Constant cell>bit		5 Constant cell>bit
	8 Constant bits/byte		8 Constant bits/byte
	8 Constant float		8 Constant float
	true Constant endian		true Constant bigendian
	( true=big, false=little )		( true=big, false=little )

mach32l.fs

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -5,5 +5,5 @@
	5 Constant cell>bit		5 Constant cell>bit
	8 Constant bits/byte		8 Constant bits/byte
	8 Constant float		8 Constant float
	false Constant endian		false Constant bigendian
	( true=big, false=little )		( true=big, false=little )